The present invention relates to a semiconductor device and a technique for manufacturing the semiconductor device and, particularly, to a technique effectively applied to a field effect transistor (hereinafter “MISFET (Metal Insulator Field Effect Transistor)”) in which the electrical thickness of a gate insulator in terms of SiO2 (hereinafter “equivalent SiO2 thickness (EOT)”) is 2.5 nm or less.
The miniaturization of the MISFET that is the basic element of a large scale integrated circuit (LSI) has been achieved based on a scaling rule. However, it is thought that a current gate insulator made of silicon oxide (SiO2) cannot be used if the physical thickness (hereinafter referred to as “thickness”) of the gate insulator is reduced to 2.0 nm or less due to the increased power consumption and the reduced reliability caused by the increase of a direct tunnel leakage current. Also, since the thin silicon oxide film as mentioned above cannot properly function as a diffusion barrier layer in impurities, the impurity leakage from the gate electrode to the substrate occurs. Furthermore, strict manufacture control is required for uniform mass productions of thin silicon oxide films each having a thickness of 2.0 nm or less.
Therefore, in order to break through the limitation of the scaling rule and achieve the further miniaturization and high-speed operation of the MISFET, development of dielectric materials capable of obtaining the field effect identical to or higher than that of the silicon oxide film has been progressed rapidly even if the thickness of the dielectric material is larger than that of the silicon oxide film. As examples of such materials, there are: the group IV oxides such as zirconia (ZrO2) and hafnia (HfO2); the group III oxides such as alumina (Al2O3); silicate that is solid solution of the metal oxides as mentioned above and silicon oxide; and the like.
The above-mentioned group IV and III oxides are the materials used as gate insulators at the early stage of the development of silicon semiconductor. However, after the establishment of technologies for forming the gate insulator made of silicon oxide, silicon oxide has been mainly used because of its excellent properties.
Note that the MISFET using zirconia as the gate insulator (e.g., IEDM′ 2001 Tech. Digest p. 451, 2001), the MISFET using hafnia as the gate insulator (e.g., 2001 Symposium on VLSI Technology Digest of Technical Papers, p. 135), the MISFET using alumina as the gate insulator (e.g., IEDM′ 2000 Tech. Digest p. 223, 2000), and the method of producing metal silicate (e.g., Japanese Patent Laid-Open No. 11-135774) has been reported so far.
Additionally, in an n type MISFET having a laminated gate insulator formed by sequentially depositing a silicon oxide film and a dielectric film in this order from below on a substrate made of single crystal silicon, an electron mobility is increased along with the increase in the thickness of the silicon oxide film due to the Coulomb scattering by a fixed charge of 1013 cm−2 or more existing at an interface between the silicon oxide film and the dielectric film (Jpn. J. Appl. Phys. Vol. 41 (2002) p. 4521).